Update to prepare the core for TFCv2

See merge request !3

Original repo used Windows format.
Our modifications used UNIX format.
The result was a mess.

This reverts commit af01ed11.

For more description go to commit 0233cc99.

Data may be shifted (with RXSLIDE) by 40 bits, which is full RX data width.
In the previous setting data was shifted by 10 bits only (verified in debug).

This should issue with RX header not being locked after some of RX resets.

Added the modifications to the externals/gbt-fpga done in https://git.cbm.gsi.de/daq/fpga-firmware/externals/gbt-fpga-cbm/-/commit/6b08529e5bbc9874566ec8b214710cd72d71bf66