Update to prepare the core for TFCv2
- Added
rx_headerflag
to AGWB interface for Rx word alignment - Moved Rx/Tx latency optimisation configuration to generics
- Added
latch_rxdata_sp
process ingbt_fpga_common.vhd
to relax timing requirements - Updated IP cores to Vivado 2021.2
Changes verified in https://git.cbm.gsi.de/daq/fpga-firmware/tfc/cri-tfc-v2/-/commit/d8f52e7eee6c376ac1729f30d07ce28ab7e1679b
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assigned to @mguminski
added 1 commit
- 12d3b7e7 - Added rxwordclk and rx_headerflag in gbt_fpga_common
mentioned in commit 94c23802
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