Skip to content
GitLab
Explore
Sign in
Primary navigation
Search or go to…
Project
V
vhdlbasics
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Releases
Package Registry
Container Registry
Model registry
Operate
Environments
Terraform modules
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
DAQ
Externals
TRB
vhdlbasics
Graph
master
Select Git revision
Branches
3
blackcat
deepsea
master
default
protected
3 results
You can move around the graph by using the arrow keys.
Begin with the selected commit
Created with Raphaël 2.2.0
4
Apr
10
Nov
9
29
May
28
22
May
3
Jan
13
May
8
7
22
Nov
6
Mar
27
Feb
30
Jan
25
21
Sep
5
30
Aug
25
24
22
24
Jul
20
18
add reload port to SEDcheck
master
master
merge i2c_slim2 from blackcat branch to master
direct I2C access
blackcat
blackcat
cleanup in I2C master to simplify state machine
deepsea
deepsea
I2C rework started
moved ecp5-version of sedcheck to vhdlbasics
Flash is corrected to right FPGA version; Addes a version with activated programming over I2C in EFB Core (flash_I2C_Prog)
added timeout counter for cfg flash
small fix
added state machine to enable cfg flash
auto flash erase
mem to flash working
Merge branch 'master' of jspc29:vhdlbasics
first version for auto write to flash
add I2C files from MB
spi interface with 2 clocks, IF
small fixes, IF
timing optimization, IF
new 16 bit scheme for flash, IF
bug fix in flash master, IF
unix format, IF
async ram, IF
flash disabled after boot, IF
32 bit master debugged, IF
burst option for flash, IF
32bit flash read and endian option, IF
added 32-bit burst, IF
asynchronous uart, IF
generic flash ctrl with generic bus width, IF
finished master in generic flash ctrl, IF
fixed missing wait for ready when reading, IF
added flash ctrl, IF
add .gitignore
Add MachXO3 Flash files
add downsampling option to PWM module
include change of SPI from Dirich
add first files to generic VHDL repo
Loading