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Created with Raphaël 2.2.07Feb18Jan28Jan30Dec29Oct214Sep24Jul13725May19116424Apr232120149330Mar26171311654325Feb191730Jan21171513Dec25Oct2423222114827Sep19111097Aug62129Jul24191615111019Jun1714331May2320107629Apr262524171211213Feb130Jan2824221011Dec30Nov29201687331Oct29121110Sep10Aug76330Jul2719Jun829May23226Mar25232019161413985223Jan14Dec1328Nov11Oct1027Sep25Aug2223Jun2May16Mar28Feb2720171410326Jan15Dec29Nov28231727Oct1713527Sep30Aug252416Jun26Apr22216130Mar6Jan18Nov1716121Oct12Aug7Jul315Apr25Feb24179Dec14Aug431Jul1730Jun10522May21201530Apr2517144128Mar20527Feb2614621Jan14920Dec1816429Nov2826221530Oct25241824Sep1893230Aug2822147529Jul24Jun22May211086330Apr262523151258Mar5128Feb2625211915141311528Jan14Dec22Nov16152Oct31Aug293110Jul9621Jun1925May242218148724Apr231817131254330Mar28fixed core file for fusesoc 2.3fix_fusesoc_2.3fix_fusesoc_2.3added core for gc_sync_edgecbm_mastercbm_masterCorrected core fileAdded xwb_register core file, needed by the newest AGWB.Added gc_glitch_filt and i2c_slave fusesoc cores.Added an modified version of wb_spi_master.Added fusesoc description of gc_single_reset_genAdded missing fusesoc dependency to wb_i2c_masterMerge branch 'release/v1.1.1' into mastermastermasterupdate CHANGELOG for release 1.1.1sw:spi: fix update spi_message->actual_lengthMerge branch 'release/1.1.0'bld: update CHANGELOGinferred_sync_fifo: fix full flag for g_show_ahead.Merge branch 'proposed_master' into release/1.1.0Improved dependencies in fusesoc desctiptionDisabled gitlab CI.Updated fusesoc description and constraints after merge.Merge remote-tracking branch 'ohwr/master' into cbm_masterAdded fusesoc cores for CDC componentsUpdated gc_pulse_synchronizer constraints[hdl] add missing default values to generic_sync_fifo thresholdssim: create accessor object to WB master interface as singletonAdd wb_xc7_fw_update module.common: added a simple non-WB SPI masterAdd gen_sourceid.py script to generate a package with the source id.gen_buildinfo.py: add comments.gen_buildinfo.py: add tag and dirty flag.Improve comments of gc_sync_word_wr and gc_pulse_synchronizer2[bld] Update changelog in preparation for release.Merge branch 'bugfix/gc_sync_ffs_negedge' into proposed_masterbtrain-v1.2btrain-v1.2[hdl] replace edge detectors in gc_sync_ffs with gc_edge_detect.[hdl] also remove gc_sync_edge component declaration from package.[hdl] use new gc_sync for pulse synchroniser as well.[hdl] remove gc_sync_edge module[hdl] Add edge sensitivity and async reset option to edge detectors.[hdl] Document g_SYNC_EDGE generic in synchronisers.Move sim/gc_sync_word_wr to testbench/wishbone.Add a testbench for xwb_indirect.sim/vhdl: provide a simple vhdl package to generate WB transactions.