L1: fix pseudo vectors
Fix L1 tracker for non-SSE mode with pseudo-sse-vectors of 4 floats
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requested review from @s.zharko
assigned to @se.gorbunov
enabled an automatic merge when the pipeline for 2eb90d04 succeeds
Dear @se.gorbunov, @v.akishina,
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after looking again in the SIMD implementation I understood that you use 4 float values in parallel or 4 float values sequential when using the pseudo vector as fallback.
If I am correct the width of the registers is meanwhile 256 or even 512 bit which you can't use with your implementation. Therefore I would propose to switch to Vc which uses all the available functionality.
@f.uhlig, yes, we need to switch to Vc. Maybe I should try to do it now.. The thing is, I want to test our KF mathematics in double precision. I don"t know what is faster - to rewrite first everything to Vc and then use Vc with double, or to reanimate our pseudo-sse code..
I can't answer what will be faster. Since you internally use fvec which is a typedef you maybe can hide also the Vc internals behind a typedef as well. Or do you need the explicit knowledge about the internal structure of fvec when you use it?
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@f.uhlig, one can not hide Vc behind our fvec interface since we use bit operatons as masks. In Vc bit operations do not exist, they have their masks and special syntax for the masked operations. So the use of vc needs some code rewriting. I'm trying it now, maybe it will be not complicated.
before you start a huge work to rewrite the code, we should discuss the issue with Matthias Kretz. He told me in some private communication not to use Vc any longer but try to use std::experimental::simd which is already part of the latest gcc compilers. Since this is something we can't use everywhere he offered also some help o get things running. He is the maintainer of the code in libstdc++ (part of gcc) and is interested in real use cases to improve the code.
