Skip to content
GitLab
Explore
Sign in
Primary navigation
Search or go to…
Project
C
cbmroot
Manage
Activity
Members
Labels
Plan
Wiki
Redmine
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Releases
Container Registry
Model registry
Operate
Environments
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
Computing
cbmroot
Commits
52a120e6
Commit
52a120e6
authored
2 years ago
by
Felix Weiglhofer
Browse files
Options
Downloads
Patches
Plain Diff
algo: Make creation of sts::ReadoutMapping less verbose.
parent
753aca62
No related branches found
No related tags found
1 merge request
!1171
algo: read STS Unpacker setup from yaml.
Changes
1
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
algo/data/sts/ReadoutSetup.cxx
+21
-17
21 additions, 17 deletions
algo/data/sts/ReadoutSetup.cxx
with
21 additions
and
17 deletions
algo/data/sts/ReadoutSetup.cxx
+
21
−
17
View file @
52a120e6
...
...
@@ -65,35 +65,39 @@ void sts::ReadoutMapping::Init(const ReadoutSetup& config)
// Constructing the map (equipmentId, eLink) -> (module, ASIC within module)
uint16_t
numElinksPerComp
=
numCrobPerComp
*
numElinksPerCrob
;
for
(
uint16_t
comp
=
0
;
comp
<
numComp
;
comp
++
)
{
uint16_t
equipment
=
config
.
components
.
at
(
comp
).
equipmentId
;
for
(
uint16_t
compIdx
=
0
;
compIdx
<
numComp
;
compIdx
++
)
{
const
auto
&
component
=
config
.
components
.
at
(
compIdx
);
uint16_t
equipment
=
component
.
equipmentId
;
fReadoutMapping
[
equipment
].
resize
(
numElinksPerComp
);
for
(
uint16_t
crob
=
0
;
crob
<
numCrobPerComp
;
crob
++
)
{
for
(
uint16_t
elink
=
0
;
elink
<
numElinksPerCrob
;
elink
++
)
{
for
(
uint16_t
crob
Idx
=
0
;
crob
Idx
<
numCrobPerComp
;
crob
Idx
++
)
{
for
(
uint16_t
elink
Idx
=
0
;
elink
Idx
<
numElinksPerCrob
;
elink
Idx
++
)
{
int32_t
moduleAddress
=
-
1
;
uint16_t
asicInModule
=
0
;
bool
isPulser
=
false
;
uint16_t
elinkId
=
numElinksPerCrob
*
crob
+
elink
;
// elink within component
int16_t
feb
=
config
.
elinks
.
at
(
elinkId
).
toFeb
;
// FEB within CROB
uint16_t
elinkId
=
numElinksPerCrob
*
crobIdx
+
elinkIdx
;
// elink within component
const
auto
&
elink
=
config
.
elinks
.
at
(
elinkId
);
int16_t
feb
=
elink
.
toFeb
;
// FEB within CROB
if
(
feb
!=
-
1
)
{
int16_t
module
=
config
.
components
[
comp
].
feb2module
[
crob
][
feb
];
// Module index
isPulser
=
config
.
components
[
comp
].
febIsPulser
.
at
(
crob
).
at
(
feb
);
// Pulser flag
if
(
module
!=
-
1
)
{
assert
(
module
<
numModules
);
moduleAddress
=
config
.
modules
.
at
(
module
).
address
;
// Module address
bool
moduleType
=
config
.
modules
.
at
(
module
).
type
;
// 0 or 1
int16_t
moduleSide
=
config
.
components
.
at
(
comp
).
feb2moduleSide
[
crob
][
feb
];
// 0 or 1, -1 is inactive
int16_t
febType
=
(
moduleType
==
0
?
moduleSide
:
!
moduleSide
);
// 0 = FEB A, 1 = FEB B
uint32_t
asicIndex
=
(
febType
==
0
?
config
.
elinks
[
elinkId
].
toAsicFebA
:
config
.
elinks
[
elinkId
].
toAsicFebB
);
int16_t
moduleIdx
=
component
.
feb2module
[
crobIdx
][
feb
];
// Module index
isPulser
=
component
.
febIsPulser
.
at
(
crobIdx
).
at
(
feb
);
// Pulser flag
if
(
moduleIdx
!=
-
1
)
{
assert
(
moduleIdx
<
numModules
);
const
auto
&
module
=
config
.
modules
.
at
(
moduleIdx
);
moduleAddress
=
module
.
address
;
// Module address
bool
moduleType
=
module
.
type
;
// 0 or 1
int16_t
moduleSide
=
component
.
feb2moduleSide
[
crobIdx
][
feb
];
// 0 or 1, -1 is inactive
int16_t
febType
=
(
moduleType
==
0
?
moduleSide
:
!
moduleSide
);
// 0 = FEB A, 1 = FEB B
uint32_t
asicIndex
=
(
febType
==
0
?
elink
.
toAsicFebA
:
elink
.
toAsicFebB
);
uint32_t
asicInFeb
=
asicIndex
%
numAsicsPerFeb
;
// ASIC number within FEB
asicInModule
=
(
moduleSide
==
1
?
asicInFeb
:
asicInFeb
+
numAsicsPerFeb
);
}
}
fReadoutMapping
[
equipment
][
elink
]
=
{
moduleAddress
,
asicInModule
,
isPulser
};
fReadoutMapping
[
equipment
][
elink
Idx
]
=
{
moduleAddress
,
asicInModule
,
isPulser
};
}
//# elink
}
//# CROB
...
...
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment