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Commit 52a120e6 authored by Felix Weiglhofer's avatar Felix Weiglhofer
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algo: Make creation of sts::ReadoutMapping less verbose.

parent 753aca62
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1 merge request!1171algo: read STS Unpacker setup from yaml.
......@@ -65,35 +65,39 @@ void sts::ReadoutMapping::Init(const ReadoutSetup& config)
// Constructing the map (equipmentId, eLink) -> (module, ASIC within module)
uint16_t numElinksPerComp = numCrobPerComp * numElinksPerCrob;
for (uint16_t comp = 0; comp < numComp; comp++) {
uint16_t equipment = config.components.at(comp).equipmentId;
for (uint16_t compIdx = 0; compIdx < numComp; compIdx++) {
const auto& component = config.components.at(compIdx);
uint16_t equipment = component.equipmentId;
fReadoutMapping[equipment].resize(numElinksPerComp);
for (uint16_t crob = 0; crob < numCrobPerComp; crob++) {
for (uint16_t elink = 0; elink < numElinksPerCrob; elink++) {
for (uint16_t crobIdx = 0; crobIdx < numCrobPerComp; crobIdx++) {
for (uint16_t elinkIdx = 0; elinkIdx < numElinksPerCrob; elinkIdx++) {
int32_t moduleAddress = -1;
uint16_t asicInModule = 0;
bool isPulser = false;
uint16_t elinkId = numElinksPerCrob * crob + elink; // elink within component
int16_t feb = config.elinks.at(elinkId).toFeb; // FEB within CROB
uint16_t elinkId = numElinksPerCrob * crobIdx + elinkIdx; // elink within component
const auto& elink = config.elinks.at(elinkId);
int16_t feb = elink.toFeb; // FEB within CROB
if (feb != -1) {
int16_t module = config.components[comp].feb2module[crob][feb]; // Module index
isPulser = config.components[comp].febIsPulser.at(crob).at(feb); // Pulser flag
if (module != -1) {
assert(module < numModules);
moduleAddress = config.modules.at(module).address; // Module address
bool moduleType = config.modules.at(module).type; // 0 or 1
int16_t moduleSide = config.components.at(comp).feb2moduleSide[crob][feb]; // 0 or 1, -1 is inactive
int16_t febType = (moduleType == 0 ? moduleSide : !moduleSide); // 0 = FEB A, 1 = FEB B
uint32_t asicIndex = (febType == 0 ? config.elinks[elinkId].toAsicFebA : config.elinks[elinkId].toAsicFebB);
int16_t moduleIdx = component.feb2module[crobIdx][feb]; // Module index
isPulser = component.febIsPulser.at(crobIdx).at(feb); // Pulser flag
if (moduleIdx != -1) {
assert(moduleIdx < numModules);
const auto& module = config.modules.at(moduleIdx);
moduleAddress = module.address; // Module address
bool moduleType = module.type; // 0 or 1
int16_t moduleSide = component.feb2moduleSide[crobIdx][feb]; // 0 or 1, -1 is inactive
int16_t febType = (moduleType == 0 ? moduleSide : !moduleSide); // 0 = FEB A, 1 = FEB B
uint32_t asicIndex = (febType == 0 ? elink.toAsicFebA : elink.toAsicFebB);
uint32_t asicInFeb = asicIndex % numAsicsPerFeb; // ASIC number within FEB
asicInModule = (moduleSide == 1 ? asicInFeb : asicInFeb + numAsicsPerFeb);
}
}
fReadoutMapping[equipment][elink] = {moduleAddress, asicInModule, isPulser};
fReadoutMapping[equipment][elinkIdx] = {moduleAddress, asicInModule, isPulser};
} //# elink
} //# CROB
......
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