From 4e80c06cf6717228972a1b3531408adc6d8dec74 Mon Sep 17 00:00:00 2001
From: Tomasz Wlostowski <tomasz.wlostowski@cern.ch>
Date: Tue, 4 Oct 2011 13:54:28 +0200
Subject: [PATCH] wishbone: moved wb_slave_adapter to separate subdir
---
modules/wishbone/Manifest.py | 6 +++++-
modules/wishbone/wb_slave_adapter/Manifest.py | 1 +
.../{ => wb_slave_adapter}/wb_slave_adapter.vhd | 10 ++++++++--
3 files changed, 14 insertions(+), 3 deletions(-)
create mode 100644 modules/wishbone/wb_slave_adapter/Manifest.py
rename modules/wishbone/{ => wb_slave_adapter}/wb_slave_adapter.vhd (97%)
diff --git a/modules/wishbone/Manifest.py b/modules/wishbone/Manifest.py
index 0cbed6b..e5452b4 100644
--- a/modules/wishbone/Manifest.py
+++ b/modules/wishbone/Manifest.py
@@ -1,17 +1,21 @@
modules = { "local" :
[
-# "wb_async_bridge",
+ "wb_async_bridge",
"wb_onewire_master",
"wb_i2c_master",
"wb_bus_fanout",
"wb_conmax",
+ "wb_dpram",
"wb_gpio_port",
"wb_simple_timer",
"wb_uart",
"wb_vic",
"wb_spi",
"wb_virtual_uart",
+ "wb_crossbar",
+ "wb_lm32",
+ "wb_slave_adapter",
"wbgen2"
]};
diff --git a/modules/wishbone/wb_slave_adapter/Manifest.py b/modules/wishbone/wb_slave_adapter/Manifest.py
new file mode 100644
index 0000000..8245799
--- /dev/null
+++ b/modules/wishbone/wb_slave_adapter/Manifest.py
@@ -0,0 +1 @@
+files = ["wb_slave_adapter.vhd"]
diff --git a/modules/wishbone/wb_slave_adapter.vhd b/modules/wishbone/wb_slave_adapter/wb_slave_adapter.vhd
similarity index 97%
rename from modules/wishbone/wb_slave_adapter.vhd
rename to modules/wishbone/wb_slave_adapter/wb_slave_adapter.vhd
index 1dcfc4a..be37af4 100644
--- a/modules/wishbone/wb_slave_adapter.vhd
+++ b/modules/wishbone/wb_slave_adapter/wb_slave_adapter.vhd
@@ -177,7 +177,13 @@ begin -- rtl
end if;
slave_out.stall <= '0';
elsif(g_slave_mode = CLASSIC and g_master_mode = PIPELINED) then
- master_out.stb <= slave_in.stb;
+
+ if(fsm_state = WAIT4ACK) then
+ master_out.stb <= '1';
+ else
+ master_out.stb <= slave_in.stb;
+ end if;
+
if(master_out.cyc = '1') then
slave_out.stall <= '0';
else
@@ -189,7 +195,7 @@ begin -- rtl
end if;
end process;
- master_out.dat <= slave_in.adr;
+ master_out.dat <= slave_in.dat;
master_out.cyc <= slave_in.cyc;
master_out.sel <= slave_in.sel;
master_out.we <= slave_in.we;
--
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