The WB CDC is not working
I have a problem with the WB CDC which comes via AGWB: it does not work. I have seen this already in the i2c_controller where I need the CDC to go from the 40 MHz sys clock to 40 MHz boot clock (see daq/fpga-firmware/cri/cri-base#44). If I use the CDC, no access is possible to the i2c block, if I directly connect the lines, everything is OK.
Therefore (to validate this problem) I added a dummy WB CDC in CRI1_GENERIC
(in my private fork). It just goes from 40 MHz -> 40 MHz. So nothing special, and in fact only a special case of a generic CDC.
And as a result I have no more the access to the WB in SLR0:
>>> ac1.cri_comm.ID.read()
1547789124
>>> ac0.cri_comm.ID.read()
Traceback (most recent call last):
File "<stdin>", line 1, in <module>
File "/home/shared/froehli/cri_artifacts/cri1_generic_2021-06-15_add_wb_i2c_1340d05a/agwb/python/agwb/agwb.py", line 279, in read
return self.x__iface.read(self.x__base)
File "/shared/home/froehli/dca/python/common/binds/DcaCriBus.py", line 575, in read
return self.obj.Read(addr)
File "/shared/home/froehli/dca/python/common/binds/DcaCriBus.py", line 148, in Read
return self.dca.Call(self.cid, self.oid, "Read", addr)
File "/shared/home/froehli/dca/python/framework/binds/Dca.py", line 243, in Call
return self.__getres(self.zsocket.recv_multipart())
File "/shared/home/froehli/dca/python/framework/binds/Dca.py", line 265, in __getres
raise Exception(rc0, rc1)
Exception: ('BAD-CALL', 'WbBal::Read(): error 0010 at 7e00')
@w.zabolotny_AT_elka.pw.edu.pl @mguminski @p.miedzik do I overlook something? The problem is that without a working CDC I have some problems to implement the FSM in the i2c_controller
Notification to @w.f.j.mueller